Graphcore’s Hardware Engineering Team creates both products for sale in volume production and hardware test & validation systems based on Graphcore’s IPU processor.
These systems allow Graphcore’s customers to develop leading-edge machine-leaning solutions for training and inference.
As a silicon packaging engineer you will work very closely with the silicon and hardware teams to understand the constraints and requirements of the silicon and PCB designs in order to generate packages which will deliver reliability and the best possible performance in volume production. You will collaborate with Graphcore’s silicon, packaging and test vendors to use the latest state of the art packaging techniques, understanding the very high speed, and high power constraints of the very large IPU die.
You will analyse mechanical and thermal design, and work closely with signal and power integrity experts to ensure the package delivers the required system performance.
The ideal candidate will have experience in :-
high speed digital interface constraints >32Gbps
high current >100A power supply delivery
thermomechanical constraints, warpage effects
package stress analysis
Cadence Allegro Package Designer suite